Physical Design Principal AE
Cadence Design Systems
📍 San Jose, California, US0💼 Full-time💰 123,000 – 229,000 USD/year🕐 5/30/2026
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Role overview
Cadence Design Systems is hiring for the Physical Design Principal AE role in San Jose, California, US. It is full-time, Lead level, in the Tech sector. The stated pay for this position is 123,000 – 229,000 USD/year. It was posted 5/30/2026.
On TalentyGo you can review this job and apply more effectively: Charlie prepares an ATS-optimized resume and a cover letter tailored to "Physical Design Principal AE" at Cadence Design Systems in about a minute. Before you apply, you can also check how well your profile fits, with a match score based on skills, experience, location and seniority.
- Role
- Physical Design Principal AE
- Company
- Cadence Design Systems
- Location
- San Jose, California, US
- Work mode
- On-site
- Employment
- Full-time
- Seniority
- Lead
- Sector
- Tech
- Salary
- 123,000 – 229,000 USD/year
- Posted
- 5/30/2026
Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Key Responsibilities
Provide technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff including Place and Route, Design Closure, and timing/power signoff
Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
• Conduct technical presentations and product demonstrations
• Drive technical evaluations/benchmarks to success
• Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements
• Drive adoption and proliferation of Cadence tools and technologies
• Amend and augment the flow as needed using Tcl and/or other programming skills to meet objectives and improve results/flows
• Capture best practices and lessons learned from current evaluations/benchmarks and utilize to improve efficiency and success rate in next engagements
Job Requirements
Minimum
• BS degree Computer Science/Engineering, Electrical, Engineering, or related field
• 5+ years of design/EDA industry experience with IC digital implementation flows and font-end EDA tools including Synthesis, DFT, and Logical Equivalence Checking
• Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required
• Prior experience with IC digital implementation flows and backend EDA tools including Place and Route, IR Drop, backend design timing and power closure
• Experience with advanced nodes 10nm and below’
• Experience in scripting languages such as Tcl/Perl/Python is a must
• Strong customer-facing communication and problem-solving skills
• Strong personal drive for continuous learning and expanding professional skill sets
• Strong verbal, written, and customer communication skills
Preferred
• MS degree Computer Science/Engineering, Electrical, Engineering, or related field
• Prior experience with Cadence tools such as Genus, Innovus, Conformal, Tempus, Modus, and/or Voltus is highly desired
• Experience with advanced nodes 5nm and below
The annual salary range for California is $123,200 to $228,800. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
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